1 |
Search |
text |
2 |
Downloads |
text |
3 |
Pricing |
text |
4 |
TestBencher |
text |
5 |
BugHunter |
text |
6 |
VeriLogger |
text |
7 |
WaveFormer |
text |
8 |
DataSheet |
text |
9 |
Timing Diagrammer |
text |
10 |
HDL Translators |
text |
11 |
GigaWave Viewer |
text |
12 |
SimSwapper |
text |
13 |
TransactionTracker |
text |
14 |
EASE |
text |
15 |
HDL Companion |
text |
16 |
IO Checker |
text |
17 |
ConnTrace |
text |
18 |
Gates-on-the-Fly |
text |
19 |
Software Options |
text |
20 |
Software Services |
text |
21 |
HDL Translation |
text |
22 |
Design Verification |
text |
23 |
Product Support |
text |
24 |
About SynaptiCAD |
text |
25 |
Employment |
text |
26 |
Distributors |
text |
27 |
Partners |
text |
28 |
Latest News |
text |
29 |
SynaptiCAD's WaveFormer supports Agilent & Tektronix equipment and Hyperlynx |
text |
30 |
Timing Diagram Editors Simplify FPGA Synthesis |
text |
31 |
VHDL/Verilog Converters upgraded for Verilog 2005 |
text |
32 |
WaveFormer Lite Generates Mixed Signal Test Benches for all FPGA design flows |
text |
33 |
VeriLogger supports encrypted models from Actel, Altera, and Xilinx |
text |
34 |
Timing Diagram Editors offer Editable Analog Equations |
text |
35 |
SynaptiCAD's 64-Bit Verilog Simulator is 30% Faster |
text |
36 |
Graphically generate VHDL, Verilog, & SPICE test benches |
text |
37 |
WaveFormer Pro for stimulus-only test benches |
text |
38 |
WaveFormer Pro with reactive test bench generation |
text |
39 |
TestBencher Pro creates transaction-based test benches |
text |
40 |
SPICE test bench stimulus (analog and digital) |
text |
41 |
Translate between Vhdl and Verilog |
text |
42 |
V2V:do-it-yourself translation tools |
text |
43 |
Full-service VHDL & Verilog translation: we do it for you |
text |
44 |
Simulate and debug VHDL and Verilog designs |
text |
45 |
VeriLogger Extreme: high-performance Verilog 2001 simulator |
text |
46 |
BugHunter Pro: graphical debugger for all HDL simulators |
text |
47 |
Gigawave Viewer: VCD/SPICE waveform viewer |
text |
48 |
Gates-on-the-Fly: netlist analyzer |
text |
49 |
Create and Navigate Verilog and VHDL Code |
text |
50 |
EASE: state diagram and block diagram editor |
text |